Advances in Consumer Research
Issue 2 : 332-338
Original Article
Persistent Electrical Overstress Recorder (PEOR) for Circuit Diagnostics
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Assistant Professor, Department of Electronics and Communication Engineering, V.S.B Engineering College Karur – 639111
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Assistant Professor, Department of Electronics and Communication Engineering,V.S.B Engineering College Karur 639111
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Department of Electronics and communication Engineering, V.S.B Engineering College, Karur - 639111
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Department of Electronics and communication Engineering,V.S.B Engineering College, Karur - 639111
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Department of Electronics and communication Engineering,V.S.B Engineering College, Karur -639111
Abstract

The Persistent Electrical Overstress Recorder (PEOR) for Circuit Diagnostics is proposed as an advanced solution for detecting, recording, and analyzing electrical stress conditions in electronic systems. Traditional protection mechanisms such as fuses and circuit breakers provide only a binary indication of failure after an overload event and do not retain any information about the magnitude, duration, or repetition of electrical stress. This limitation restricts accurate fault diagnosis and prevents effective predictive maintenance. The proposed PEOR system continuously monitors over-voltage and over-current conditions during normal operation and permanently stores the detected stress information using non- volatile resistive random-access memory (RRAM). Due to its non-volatile nature, the recorded stress data is preserved even during power interruptions, ensuring complete stress history retention. Furthermore, the inherent multilevel storage capability of RRAM enables representation of stress severity beyond simple binary states. An Internet of Things (IoT) communication module is integrated to transmit the stored stress data to a remote monitoring platform, enabling real-time visualization, early fault warnings, and condition-based maintenance. By combining persistent stress memory with cloud-enabled diagnostics, the PEOR system enhances reliability, safety, and lifetime estimation of electronic circuits. The proposed architecture is well suited for automotive electronics, industrial power systems, and mission- critical embedded applications where undetected electrical stress can lead to latent failures.

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